DFT Engineer

Hello #Connections,
📢 Hiring: DFT Engineers – Freshers (2022 Pass-Outs or Earlier)
Greetings from Logicsemi Technologies Pvt Ltd!!

We are looking for passionate and motivated freshers interested in building their careers in Design for Testability (DFT) within the semiconductor and VLSI domain.
📌 Job Details:
• Position: DFT Engineer – Fresher
• Experience: Freshers
• Eligible Pass-Outs: 2022 or earlier
• Location: Bangalore

🔹 Key Responsibilities:
• Learn and support Design for Testability (DFT) methodologies.
• Understand scan insertion and scan chain architecture.
• Gain knowledge of Automatic Test Pattern Generation (ATPG).
• Learn fundamentals of fault models, fault simulation, and test coverage.
• Understand DFT architecture and testability requirements.
• Support DFT checks, debugging, and verification activities.
• Learn concepts related to Memory BIST (MBIST) and Logic BIST (LBIST).
• Work with senior engineers to understand DFT implementation and testing flows.
• Assist with DFT-related design documentation and reporting.
🔹 Required Skills:
✅ Basic knowledge of digital electronics and VLSI fundamentals.
✅ Understanding of Verilog or SystemVerilog is an added advantage.
✅ Knowledge of digital logic design and semiconductor testing concepts.
✅ Basic understanding of scan chains, ATPG, and fault models is preferred.
✅ Familiarity with scripting languages such as Python, Tcl, or Perl is a plus.
✅ Good analytical, problem-solving, and debugging skills.
✅ Willingness to learn DFT tools and methodologies.

🎓 Eligibility Criteria:
• Candidates who passed out in 2022 or earlier are eligible to apply.
• Graduates in ECE, EEE, Electronics, or related disciplines are preferred.

📩 Interested candidates can share their resumes at: [contact shared on WhatsApp]

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